A
Dense and Sparse Space
I/O space is divided into 8 512-MB slots corresponding to I/O ports and further
divided into dense and sparse space.
Caution: Dense and Sparse Space Interaction
If operations that address the same location switch between dense and
sparse space, you must execute memory barriers before changing spaces.
Memory barriers prevent out-of-order accesses to those locations.
Every byte of I/O space is doubly-mapped to a byte in dense I/O space and a
longword in sparse I/O space. A physical address (PA) is located in dense I/O
space if PA<28> = 0, and in sparse I/O space if PA<28> = 1, with two exceptions.
Exceptions
The scatter/gather map (400/500/600/700/800/900 models) may be read
from either dense or sparse I/O space, but can be written to only in
sparse space. Reading dense space 1.C260.0000 reads the interrupt mask
register and clears the interrupt register. Do not perform that operation.
Reading the corresponding sparse space 1.D4C0.0000 reads and clears the
interrupt register.
This appendix discusses the following topics:
• Layout of dense and sparse I/O space (Section A.1)
• Required number of transactions (Section A.2)
• Minimum granularity (Section A.3)
• Byte-masked I/O read operations (Section A.4)
• The effect of load and store instructions in dense and sparse space
(Section A.5)
• Mapping I/O Addresses (Section A.6)
Dense and Sparse Space A–1
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