Glossary
The glossary defines some of the technical terms and abbreviations used in this
manual.
~
Indicates a negation in logic.
A-box
Component of the DECchip 21064 CPU that contains the following major
sections: address translation data path, load silo, write buffer, data cache
interface, external bus interface, and internal processor registers.
ABOX_CTL register
The A-box control register directs the actions of the DECchip 21064 CPU’s A-box
unit.
ASIC
Application-specific integrated circuit.
Assert
To cause a signal to change to its logical true state.
Bcache
The DECchip 21064 CPU’s backup cache; a second, very fast, memory that is
used in combination with slower, large-capacity memories.
Bus interface unit
Logic designed to provide an interface from internal logic, from a module or chip,
to a bus.
BIU_CTL
Bus interface unit control register; directs the actions of the bus interface control
unit.
Byte-masked read/write
A write cycle that updates only one or more selected bytes of a data block.
Dcache
A high-speed memory reserved for the storage of data.
DCT
See device configuation table.
Glossary–1
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