Vax 613 0S Instruction Manual download pdf (Page 3)

Contents

Preface ............................................................ xiii

1 Introduction to the DEC 3000 Models 300/400/500/600/700/800/900

AXP

1.1 System Description: 300 Models ................................ 1–2

1.2 System Description: 400 Models ................................ 1–6

1.3 System Description: 500 Models ................................ 1–9

1.4 System Description: 600/700 Models ............................. 1–13

1.5 System Description: 800/900 Models ............................. 1–16

1.6 CPU Differences Among Models. ................................ 1–19

2 Memory and I/O Addressing

2.1 Memory Alignment . . ........................................ 2–2

2.2 Memory Address Spaces....................................... 2–2

2.3 I/O Address Spaces . . ........................................ 2–3

2.4 TURBOchannel Interface Bit Decode Map for I/O Addresses ........... 2–7

2.5 CPU Registers .............................................. 2–9

2.5.1 ABOX Control Register (ABOX_CTL) . . ....................... 2–9

2.5.2 Bus Interface Unit Control Register (BIU_CTL) . . ............... 2–11

2.6 Bcache Tag Space ............................................ 2–12

3 TURBOchannel I/O Registers

3.1 I/O Interface Register Map (300 Models) . . . ....................... 3–1

3.2 I/O Control and Status Registers (300 Models) ..................... 3–2

3.2.1 Interrupt Register (IR)—1.E000.0000 . . ....................... 3–3

3.2.2 TURBOchannel Control and Status Register (TCSR)—1.E000.0008. . 3–4

3.2.3 Memory Conﬁguration Register (MCR)—1.E000.0010 ............. 3–5

3.2.3.1 MCR Use and Format . . ................................ 3–5

3.2.3.2 Memory Conﬁguring Using the MCR ....................... 3–5

3.2.4 Diagnostic LED Register (LED)—1.E000.0018 ................... 3–7

3.3 TURBOchannel Interface Registers (400/500/600/700/800/900 Models) . . . 3–8

3.3.1 I/O Slot Conﬁguration (IOSLOT) Register—1.C200.0000, 1.C200.0020

(Alternate address)........................................ 3–10

3.3.2 TURBOchannel Conﬁguration (TCCONFIG)

3.3.3 Failing Address Register (FADR)—1.C200.0010 . . . ............... 3–13

3.3.4 TURBOchannel Error Register (TCEREG)—1.C200.0018 . . . ....... 3–14

3.3.5 Memory Conﬁguration Registers ............................. 3–15

3.3.6 Interrupt Mask Register (IMR)—1.C240.0000 ................... 3–15

3.3.7 Interrupt Register (IR)—1.D480.0000 . . ....................... 3–17

3.3.8 Scatter/Gather Map ....................................... 3–19

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Vax 613 0S Instruction Manual Page 3