• Actions taken by hardware for a DMA abort:
~err -> option
uncorr interrupt -> CPU
error logged in FADR, TCEREG, and IR
DMA is aborted
• Actions taken by hardware for an I/O error:
• uncorr interrupt -> CPU
• error logged in FADR, TCEREG, and IR
• write is aborted, bad read data is returned
• Actions taken by hardware for an invalid I/O address error:
• uncorr interrupt -> CPU
• error logged in FADR, TCEREG, and IR
• reads and writes will have UNPREDICTABLE results
• Actions taken by hardware for a corrected ECC error:
• corr interrupt -> CPU
• error logged in FADR, TCEREG, and IR
• DMA is continued
The programming requirements on DMA error are:
• All errors assert Uncorr Interrupt to the CPU. Errors also stop DMA until
the state machines are idle.
• PALcode is activated, builds frame with r=1 or 0, clearing ISR, unlocking
other registers.
• Machine check handler wakes up, must put information from ISR, other
DMA-related registers in a slot-specific area of memory that the option-level
driver can interrogate.
• Machine check handler exits or halts system.
• Driver can now wake up, since its IPL was lower than machine check handler
• Driver interrogates option registers, then slot-specific memory area.
• Driver clears slot-specific memory area, synchronizing access, so that the
driver cannot interrogate the slot-specific area of memory before it is written
by the machine-check handler in the case of errors.
• SCSI DMA read operations from memory using scatter/gather maps must
include a valid guard page after the end of the actual buffer space if
prefetching of DMA read data is enabled.
• All option-level I/O drivers must follow the rules outlined in the previous
table note.
Hardware Exceptions and Interrupts 10–11
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