Vax 613 0S Instruction Manual download pdf (Page 91)

BRES2 (Bresenham register 2)

This register contains the address increment and error increment for the

case of a non-negative error value. This error increment is a positive

value which is subtracted from the base error value.

Note

Value at initialization: 0

The register’s format and contents are:

00151631

MR−0085−93RAGS

ADDRESS INCREMENT 2 ERROR INCREMENT 2

BRES3 (Bresenham register 3)

This register contains the initial error value for the Bresenham line

draw algorithm. This value is fed in as a signed value. This initial sign

determines the address increment that is chosen in the next cycle.

This register also contains the initial line length, a 4-bit value that can

write from 1 to 16 pixels for the ﬁrst line operation. The line length is

0-F (hexadecimal numbering): 1-F specify line lengths 1-15 (decimal);

0 speciﬁes a length of 16 (decimal). At initialization and at the end of

each operation, the LineLength value is reset to 0, for a LineLength of 16

(decimal).

Note

Value at initialization: 0

The register’s format and contents are:

04 03 0015 1431

MR−0086−93RAGS

INITIAL ERROR VALUE RESERVED LINELENGTH

To start a line write operation, set up the Bresenham registers. Then perform

one of two operations:

Perform a 32-bit aligned VRAM write operation. Bits 16 and 17 in the

data ﬁeld are used to determine the byte address for the write, because

TURBOchannel addresses are longword addresses only. The remaining

address bits come directly from the TURBOchannel address.

Load the address register with the pixel address of the ﬁrst line; then

write the BCONT address. The hardware uses the address from the

address register for the ﬁrst write operation.

CXTurbo Graphics Subsystem: 300/500 Models 6–11

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Vax 613 0S Instruction Manual Page 91