Vax 613 0S Instruction Manual download pdf (Page 335)

DMA (cont’d)

virtual

programming requirements, 9–3

reading and writing scatter/gather map,

5–3

scatter/gather map format, 5–2 to 5–3

Dual SCSI

aborting transactions, 9–19

address map, 8–2

ASIC required reconﬁguration, 9–15

determining oscillator frequency, 9–16

differences among models, 9–15

DMA buffers, 8–14

error/interrupt matrix, 10–12 to 10–13

initiation of DMA transfers, 9–18 to 9–19

internal registers, 8–3 to 8–11

interrupt service, 9–19

unaligned DMA write operation, 9–19

E

ENABLE_AUDIT keyword, 16–21

ENABLE_INTERRUPT register, SFB ASIC, 6–16

Error

Bcache tag error recovery, 10–16

behavior of system hardware under, 10–4

handling and recovery, 10–15

insertion for testing purposes, 10–14

selected PAL recovery algorithms, 10–16 to

10–17

Error/interrupt matrix, 10–5 to 10–11

dual SCSI, 10–12 to 10–13

Errors and interrupts, sources, 10–2 to 10–3

Ethernet

station address ROM, 9–9

station address ROM addresses, 7–18 to 7–20

ETHERNET keyword, 16–21

EXAMINE console command, 16–14

access size options, 16–15

address options, 16–15

miscellaneous options, 16–15

F

FADR, see failing address register

Failing address register

TURBOchannel interface

400/500/600/700/800/900 models, 3–13

TURBOChannel interface

400/500/600/700/800/900 models, 3–13

FAST_SCSI_A/B keyword, 16–21, 16–27

Firmware

ROM format, 13–1

ROM object components, 13–5

system and I/O ROM contents, 13–1 to 13–2

system ﬁrmware entry, 14–9 to 14–13

boot, 14–9

halt, 14–12

Firmware

system ﬁrmware entry (cont’d)

reentry control, 14–13

restart, 14–9

system ROM format, 13–3 to 13–6

system ROM header components, 13–4 to 13–5

FIXUP, console service routine, 16–57

overview, 16–53

Foreground register, SFB ASIC, 6–14

Forgotten console password, 16–32

Frame buffer and video register map, 6–5 to 6–6

Frame buffer control registers, 6–5 to 6–6

G

GETC, console service routine, 16–58

GETENV, console service routine, 16–59

Graphics system, see CXTurbo, 6–2

H

HALT console command, 16–18

HELP console command, 16–18

Horizontal setup register, SFB ASIC video timing

registers, 6–18

HWRPB, 16–34 to 16–52

console routine block, 16–47

console terminal block, 16–43

general information, ﬁgure, 16–34

general structure, ﬁgure, 16–32

memory data descriptor table, 16–50

per-CPU slot, 16–38

per-CPU slot, ﬁgure, 16–38

I

IMER, see dual SCSI interrupt mask enable

register

IMR, see interrupt mask register

IOSLOT, see I/O slot conﬁguration register

IR, see interrupt register

I/O

address map

300 models, 2–4

400/500/600/700/800/900 models, 2–5

address spaces, 2–3 to 2–6

conﬂicts, 9–7

control and status registers

300 models, 3–2 to 3–7

interrupt register, 3–3

diagnostic LED register

300 models, 3–7

DMA requirements, 9–3

interface register map

300 models, 3–1

interrupt handling during /O operations, 9–4

masked read operations

300 models, 9–7

Index–3

1 2 ... 330 331 332 333 334 335 336 337 338 339 340 ... 343 344

Comments to this Manuals

No comments