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5.2 KA64A/FV64A Coprocessors
The <REFERENCE>(rigel) uses a high-speed system bus, called
the <REFERENCE>(XMI) bus, to interconnect its processors
and its memory modules. In Figure 5–3 all I/O devices con-
nect to the VAXBI bus. The <REFERENCE>(rigel) supports
multiprocessing with up to six scalar processors or one or
two scalar/vector pairs.
Figure 5–3: VAX 6000 Model 400 Vector Processing System
MEMORY
msb-0526A-90
SCALAR
CPU
VECTOR
CPU
VECTOR
CPU
SCALAR
CPU
VIB
XMI
DWMBB
I/O
INTERFACE
VIB
MEMORYMEMORY
NOTE: Installation of an <REFERENCE>(xrv) vector processor requires
that the attached <REFERENCE>(XRP) module (T2015) be at a
minimum revision of K. In addition, the ROMs on any additional
<REFERENCE>(XRP) modules must be at a minimum revision of V2.00
(ROM 0 and ROM 1).
5–4 VAX 6000 Models 300 and 400 Service Manual
- VAX 6000 Models 300 and 400 1
- Service Manual 1
- Contents 3
- Chapter 6 MS65A Memory 5
- Chapter 7 DWMBB I/O Adapter 6
- Examples 7
- The VAX 6000 Family 13
- Intended Audience 13
- Document Structure 13
- VAX 6000 Series Documents 15
- Associated Documents 16
- Title Order Number 17
- Operating System Manuals 17
- Peripherals 17
- VAX Manuals 17
- Introduction 18
- 1.1 Why Read This Document 19
- Figure 1–2: Power-Up 25
- Introduction 1–9 26
- Diagnostics 28
- 2.1 Diagnostic Overview 29
- Test Description 32
- RBDn> ST2/T=1:26 D 37
- 2.3.2 START Command 39
- 2.3.3 START Command Qualifiers 40
- 2.3.6 SUMMARY Command 47
- 2.3.7 Sample RBD Session 49
- Document Order Number 55
- 2.4.2 Running VAX/DS 59
- >>> BOOT /R5:10 CSA1 60
- 2.4.3 Sample VAX/DS Session 61
- 2.4.4 VAX/DS Diagnostics 67
- Diagnostics 2–43 68
- Diagnostics 2–45 70
- Diagnostics 2–47 72
- Chapter 3 73
- INTERFACE 78
- GATE ARRAY 78
- 3.4 Boot Processor 82
- 3.5 Power-Up Sequence 84
- Table 3–2: KA62B Error LEDs 93
- 3.8 ROM-Based Diagnostics 95
- 3.8.2 CPU/Memory Test — RBD 1 100
- Test Function 101
- One pass was completed 103
- 3.9 VAX/DS Diagnostics 104
- 3.10 Machine Checks 106
- Parameter Value Description 107
- 3.11 Console Commands 108
- Command Function 109
- ENCE>(xyp) 127
- Private Space 128
- Chapter 4 129
- Specifications 130
- Parameter Description 131
- XMI CARD CAGE 132
- PROCESSOR 132
- To Vector 134
- 4.4 Boot Processor 138
- 4.5 Power-Up Sequence 140
- Boot Processor prints 143
- DWMBB test results 143
- Boot Processor 143
- >>n 144
- Console Display 145
- SELF-TEST PASSED 147
- BOOT CPU 147
- SELF-TEST FAILED 147
- SECONDARY CPU 147
- Register 151
- Table 4–3: XMI Base Addresses 152
- XGPR <30:24> 153
- 4.9 ROM-Based Diagnostics 154
- 4.10.1 Self-Test — RBD 0 156
- KA64A Tests 158
- FV64A Tests 159
- FV64A/Memory Interaction 161
- 4.11 VAX/DS Diagnostics 162
- 4.12 Machine Checks 164
- Parameter 165
- (hex) or 165
- Bit Description 165
- 4.13 Console Commands 166
- ENCE>(XRP) 190
- Chapter 5 192
- Figure 5–2) 194
- 5.2 KA64A/FV64A Coprocessors 195
- M V P M V P 197
- M V P P P P 197
- 6 0 P P P P P P 198
- 4 1 M V P P P P 198
- 2 2 M V P M V P 198
- 5.4 Functional Description 199
- Self-Test LED 201
- 5.8 VAX/DS Diagnostics 207
- 5.9 Machine Checks 208
- 5.10 Vector Console Commands 209
- MS65A Memory 221
- 6.2 MS65A Configuration Rules 224
- 6.3 MS65A Specifications 225
- 6.6 MS65A Interleaving 230
- 6.8 MS65A Addressing 234
- 6.9 Memory Self-Test 236
- 6.10 Memory Self-Test Errors 238
- 6.11 Memory RBD 240
- Table 6–4: RBD 3 Parameters 241
- 6.12 Memory RBD Test Examples 242
- CSR Name Mnemonic Address 244
- MS65A Memory 6–25 245
- System Type MS65A MS62A Mixed 246
- DWMBB I/O Adapter 248
- 7.1.2 Specifications 251
- DWMBB I/O Adapter 7–5 252
- <REFERENCE>(XMI) Node 254
- No. VAXBI Channel Location 254
- Test Function Default 259
- DWMBB I/O Adapter 7–13 260
- Table 7–6: VAXBI Registers 261
- DWMBB I/O Adapter 7–15 262
- Name Mnemonic 263
- Appendix A 264
- Error Message Meaning 265
- Appendix B 274
- Appendix C 285
- Power-up tests broken 286
- Update not allowed 286
- 3.0 5.0 Processor updated 286
- Control Flags for Booting 287
- Bit Function 288
- Glossary 289
- Glossary–6 294
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