Vax performance V-008 SP User's Guide download pdf (Page 48)

How the MACRO Compiler Functions on Different Platforms

2.11 Preserving VAX Atomicity and Granularity

Because byte, word, and unaligned longword access also severely limits

performance, an OpenVMS Alpha system can only access aligned longword

or quadword locations. Therefore, a sequence of instructions to write a single

byte, word, or unaligned longword causes some of the surrounding bytes to be

read and rewritten.

While Itanium has instructions for accessing bytes and words, there is a

performance penalty if they are unaligned.

These architectural differences can cause data to become corrupted under certain

conditions.

In an OpenVMS Alpha system, atomicity and granularity preservation are not

provided by locking out other threads from modifying memory, but by providing

a way to determine if a piece of memory may have been modiﬁed during the

read-modify-write operation. In this case, the read-modify-write operation is

retried.

In an OpenVMS I64 system, atomicity is achieved by retrying the operation as for

OpenVMS Alpha.

To ensure data integrity, the compiler provides certain qualiﬁers and directives to

be used for the conditions described in the following sections.

2.11.1 Preserving Atomicity

On OpenVMS VAX, OpenVMS Alpha, and OpenVMS I64 multiprocessing systems,

an application in which multiple, concurrent threads can modify shared data in

a writable global section must have some way of synchronizing their access to

that data. On a OpenVMS VAX single processor system, a memory modiﬁcation

instruction is sufﬁcient to provide synchronized access to shared data. However,

it is not sufﬁcient on OpenVMS Alpha or OpenVMS I64 systems.

The compiler provides the /PRESERVE=ATOMICITY option to guarantee

the integrity of read-modify-write operations for VAX instructions that have

a memory modify operand. Alternatively, you can insert the .PRESERVE

ATOMICITY and .NOPRESERVE ATOMICITY directives in sections of VAX

MACRO source code as required to enable and disable atomicity.

For instance, assume the following instruction, which requires a read, modify,

and write sequence on the data pointed to by R1:

INCL (R1)

In an OpenVMS VAX system, the microcode performs these three operations.

Therefore, an interrupt cannot occur until the sequence is fully completed.

In an OpenVMS Alpha system, the following three instructions are required to

perform the one VAX instruction:

LDL R27, (R1)

ADDL R27, 1, R27

STL R27, (R1)

Similarly, in an OpenVMS I64 system, the following four instructions are

required:

ld4 r22 = [r9]

sxt4 r22 = r22

adds r22 = 1, r22

st4 [r9] = r22

2–22 How the MACRO Compiler Functions on Different Platforms

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Vax performance V-008 SP User's Guide Page 48

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